[sv-bc] Question on const declaration RHS

Hi,
As per SV 1800 LRM, the RHS side of 'const' declaration should be 
consisting of normal const_expression or anything which is already 
declared by another 'const' declaration.

But consider the e.g. below:
module top;
    int x;
    function int f(input y);
        x = 1;
        return f + x;
    endfunction
    const int r1 = f(1); // function 'f' is not a constant as it used a 
global non-parameter variable 'x'
    const int r2 = x; // 'x' is not declared with 'const'
endmodule

Most of the standard simulators pass the case. Is it a bug in the 
simulators? Also OVM package has this type of declaration too which is 
against LRM. Please comment.

-- 
Regards
Surya




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