[sv-bc] RE: [sv-ec] Wrong SV code in VMM

From: Mirek Forczek <mirekf_at_.....>
Date: Fri Jul 18 2008 - 02:52:36 PDT
Hi,

ad 2)

Please note that in C++ in example having the default in both places is
considered as an error.

And such resolution is reasonable somehow: once you allow the default to be
specified in two places, there is a risk that one othe placed will be
updated later and the other not,
which will lead to hard-tracking bugs.

Regards,
Mirek  

-----Original Message-----
From: owner-sv-ec@server.eda.org [mailto:owner-sv-ec@server.eda.org] On
Behalf Of Bresticker, Shalom
Sent: 18 lipca 2008 11:41
To: Surya Pratik Saha; sv-ec@server.eda.org; sv-bc@server.eda.org
Subject: RE: [sv-ec] Wrong SV code in VMM

Hi,

You're correct, there is no SV 1800-2008 LRM.

1. You're correct, `" is only defined in macro text. In fact, this is one of
the gotchas appearing in the SV Gotchas paper I will be presenting at Boston
SNUG in September.

2. In Draft 6, 8.23 says,

"The out-of-block method declaration shall match the prototype declaration
exactly; the only syntactical difference is that the method name is preceded
by the class name and the class scope resolution operator ::."

That seems to require that the default appear in both places.

Regards,
Shalom

> -----Original Message-----
> From: owner-sv-ec@server.eda.org
> [mailto:owner-sv-ec@server.eda.org] On Behalf Of Surya Pratik Saha
> Sent: Friday, July 18, 2008 12:19 PM
> To: sv-ec@server.eda.org; sv-bc@server.eda.org
> Subject: [sv-ec] Wrong SV code in VMM
> 
> Hi,
> I am not sure whether this is the appropriate body to discuss about 
> this matter, but since it is related to SV, so I am sending the mail. 
> If it is not appropriate, please ignore this.
> 
> I have downloaded the freely available VMM release (version 1.0.1), 
> where it is mentioned it is compatible with SV 1800-2008. But I don't 
> think there is any SV 1800-2008 LRM.
> Or do I miss any?
> 
> Moreover, I have seen following problems in that VMM.
> 1) A special syntax used with `".
> Consider the e.g:
> `define VMM_CHANNEL xxx
> module top;
>     initial begin
>         $display("VMM_CHANNEL %s", `"`VMM_CHANNEL`");
>     end
> endmodule
> 
> Here `" is used in normal position. But as per SV 1800-2005 LRM, `" 
> can only be used in macro text. Is it changed later?
> 
> 2) Function declaration having default argument, though body does not 
> have.
> Consider the e.g.:
> module top;
>     class C;
>         extern function int f(input x, input y = 1);
>         endclass
>     function int C::f(input x, input y);
>         f = x;
>     endfunction
>     int x;
>     C c;
>     initial begin
>         x = c.f(1);
>     end
> endmodule
> 
> Where for 'y', the function declaration is having default argument 
> value, whereas the body does not have. I am not sure whether LRM 
> supports that or not.
> 
> --
> Regards
> Surya
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Received on Fri Jul 18 02:53:42 2008

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