RE: [sv-bc] Resend: E-mail Ballot: Respond by 8am PDT, Tuesday, March 25

>> 1. There is lack of example for:
>> module mh7(input integer x); // input wire  integer x
>
>I think this is covered by
>module mh2(inout integer x);        // inout wire integer x

You are right.

>> 2. And I've one more question - what should happen when we use type 
>> which wich is forbidden to be a net in context which implicitly 
>> enforce net nature of a port ie:
>> module mh(input int x); // input wire  int x //int cannot be a 
>> NET!!!!!
>
>"input wire int x" is an illegal declaration.
>The LRM is (or will be) clear that if an input declaration specifies the
direction and does not specify the port kind, it is a net. There is no
provision to make it a variable, so it will be illegal.
>
>This is related to in Mantis 1984 also.

Ok., same situation for class based example - so it should work as I thougth
- thank you.


DANiel


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