[sv-bc] RE: [sv-ec] !, && and || operators allowed for virtual interface or event or chandle variables

That e-mail was suggesting the change to the LRM that would be needed to
make those operators legal.

 

So yes, it is currently illegal behavior by the LRM, but is not
irrational behavior by the simulator.

 

Dave

 

 

________________________________

From: Moumita [mailto:moumita@cal.interrasystems.com] 
Sent: Monday, March 10, 2008 10:20 PM
To: Rich, Dave
Cc: sv-bc; sv-ec
Subject: Re: [sv-ec] !, && and || operators allowed for virtual
interface or event or chandle variables

 

Hi Dave,

In the sv-bc mail list (subject: List of operators allowed on class
object) I have found
a mail where you mentioned that !,&& and || logical operators are valid
for class handle variable .
But it is contradicting the table 11-1 in draft 4.
Most of the simulators are passing  !,&& and || logical operators for
class handle variable .
So  simulator behavior is illegal in this context?

Thanks and regards,
Moumita


Rich, Dave wrote: 

Those operators are currently not legal any for data type that accepts
null as a value. See table 11-1 in draft 4. For example, you must write
your first expression as
 
initial begin
         if ((vi3!=null) || (vi1!=null))
 
There has been some discussion about the meaning of
 
if (vi3)
 
which the LRM says is equivalent to
 
if (vi3 !=0)
 
and would clearly be illegal, but most implementations already accept
that.
 
Dave
 
 
 
  

	-----Original Message-----
	From: owner-sv-ec@server.eda.org
[mailto:owner-sv-ec@server.eda.org]
	    

On
  

	Behalf Of Moumita
	Sent: Monday, March 10, 2008 12:51 AM
	To: sv-bc; sv-ec
	Subject: [sv-ec] !, && and || operators allowed for virtual
interface
	    

or
  

	event or chandle variables
	 
	Hi,
	 
	!, && and || operators are allowed for class handle variable as
null
	    

can
  

	be
	assigned to any class handle variable.
	 
	And null can also be assigned to any virtual interface or event
or
	    

chandle
  

	variable
	So  !, && and || operators should be allowed for these variables
too.
	So if we have a testcase -
	    I1 i1();
	    virtual i1 vi1 = null;
	    virtual i1 vi3 = null;
	    chandle d, a   ;
	    event e1, e2 = null;
	 
	    initial begin
	        if (vi3 || vi1)  //|| operaor is used with virtual
interface
	variable
	 begin
	 end
	        if( d && a)  //&& operator is used with chandle variable
	 begin
	        end
	        if(!e1) // ! operator is used with event varaible
	        begin
	        end
	    end
	endmodule
	 
	interface I1;
	endinterface
	 
	 
	Is there any issue for these cases?
	 
	Thanks and regards,
	Moumita
	 
	 
	 
	 
	 
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