[sv-bc] RE: [sv-ec] restriction on typedef on net.

From: Brad Pierce <Brad.Pierce_at_.....>
Date: Tue Jan 15 2008 - 08:43:49 PST
SV-BC,
 
This looks like a question for you, not SV-EC.
 
-- Brad

________________________________

From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
danielm
Sent: Tuesday, January 15, 2008 7:44 AM
To: sv-ec@eda.org
Subject: RE: [sv-ec] restriction on typedef on net.



LRM defines integral type as:
"The term integral is used throughout this standard to refer to the data
types that can represent a single basic
integer data type, packed array, packed struct, packed union, enum, or
time."

In restriction for net types LRM uses that term:
"Certain restrictions apply to the data type of a net. A valid data type
for a net shall be one of the following:
a) A 4-state integral type, including a packed array or packed struct
b) An unpacked array or unpacked struct, where each element has a valid
data type for a net"

Reading both above it is unclear to me which types are allowed as net
type  - why only packed array and packed struct are explicitly included
while they are in integral type definition same as union and enums. what
about packed  union and enum.
Is packed union allowed or not: 

wire union packed {integer i, reg[31:0] r} wire_union;

 

DANiel


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Received on Tue Jan 15 08:44:31 2008

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