>From: "Rich, Dave" <Dave_Rich@mentor.com> >I don't see how this logic optimization is any different than what one >would use to perform port net collapsing. Any global optimization that >normally looks for the absence of forces, hierarchical references, or >PLI write access could perform the same port collapsing on logic types >in those cases because there is no difference between a wire and a var >kind. I agree that you may be able to recover some of the performance loss by collapsing var ports in some cases also. As you mention, this would require analysis to determine the cases where this optimization was valid, i.e. that it produces behavior that would be valid for the design without port collapsing (I don't say equivalent, since it might change the original behavior to some other valid behavior, perhaps with different event ordering). For nets, port collapsing is explicitly allowed, whether it changes the visible behavior or not. So net ports can legally be collapsed in cases where var ports cannot. This means that nets still have a performance advantage, though I don't know how much. Steven Sharp sharp@cadence.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Jul 10 14:18:31 2007
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