RE: [sv-bc] Port of a modport can be an another modport ?

This was mantis 629 (IEEE Ballot issue 246). There was a heated debate
about the compositional view of nested modport versus a hierarchical
view. In the end, both forms were rejected. You cannot use nested
modports. Your only choice is to bring individual nested signals up into
a modport expression.

Dave


> -----Original Message-----
> From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org]
On
> Behalf Of Brad Pierce
> Sent: Tuesday, May 22, 2007 6:20 AM
> To: sv-bc@server.eda.org
> Subject: Re: [sv-bc] Port of a modport can be an another modport ?
> 
> Dhiraj,
> 
> Your example is not generated by the BNF.  And it is not in the spirit
> of the following restriction from 20.4
> 
>     "All of the names used in a modport declaration shall be declared
by
> the same interface as the modport itself."
> 
> But what if you had used a modport expression (20.4.4)?  Would a
> modport_identifier (or, in your case, an XMR to a modport_identifier)
be
> a valid expression?
> 
> -- Brad
> 
> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
> Dhiraj Kumar Prasad
> Sent: Tuesday, May 22, 2007 3:20 AM
> To: sv-bc@eda.org
> Cc: beacon-sv@cal.interrasystems.com
> Subject: [sv-bc] Port of a modport can be an another modport ?
> 
> Hi,
> 
> According to LRM P1800.2005,section 20.4
> 
> interface i2;
> wire a, b, c, d;
> modport master (input a, b, output c, d); modport slave (output a, b,
> input c, d); endinterface
> 
> module m (i2.master i);
> ...
> endmodule
> 
> Above testcase is valid but can you let me know that whether the
> following testcase is valid or not?
> 
> interface i1;
> interface i2;
> wire a, b, c, d;
> modport master (input a, b, output c, d); modport slave (output a, b,
> input c, d); endinterface
> i2 tmp1(.*), tmp2(.*);
> modport master1 (tmp1.master,tmp1.slave); modport
> slave2(tmp2.master,tmp2.slave); endinterface
> 
> module m();
> endmodule
> 
> Here in above testcase the port of modport is an another modport which
> is declared through hierarchical reference through instance. so is it
a
> valid testcase?
> 
> 
> Thanks,
> Dhiraj
> 
> 
> 
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