RE: [sv-bc] P1800 draft2 review : Sec 9 Processes

Hi,

 

9.1.2.2

    This is a rather nit-picky thing.  Section 9.1.2.2 contains the
sentence "SystemVerilog provides a special always_comb procedure for
modeling combinational logic behavior."

      What makes always_comb so special, does it think its better than
all the other types of processes? :-)

     I think this sentence made more sense in 1800-2005 as way of
stating that always_comb was only in SV, not in plain old Verilog, but
in the merged document shouldn't all procedures be created equal?

 

[SB] Nope. always_comb is specially tailored for combinational logic.
You can use a plain always, but always_comb is recommended. 'special'
means 'special purpose' or 'specialized'.

 

 

 

9.1.2.2

     The phrase "a normal always procedure" has been replaced with "the
general purpose always construct"

     :Aren't we trying to use the term 'procedure' not 'construct' in
this version of the document?

 

[SB] Right, the consistency has to be done everywhere.

 

Shalom


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