RE: [sv-bc] part selects on arbitrary expressions

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Mon Mar 12 2007 - 05:17:01 PDT
Yulik,

Some of what you write is playing around with words.

> Examples from 1364 are not good, as 1364 didn't make distinction
> between packed and unpacked arrays and didn't define type
> compatibility rules. The syntax of arrays in Verilog resembles the
> syntax of unpacked arrays in SystemVerilog, but that doesn't mean that
> the examples in 1364 should be considered as referring to SV unpacked
> arrays with their type compatibility rules.

[SB] Examples from 1364 ARE good as back-compatibility is preserved
except in special cases, such as use of SV keywords.

1364 has 1-D packed arrays, called vectors, and multi-D unpacked arrays.
See 1800 5.1 which explains the correspondence in terms.
An array element assignment that works in 1364 must work in 1800, also.

> 
> I may understand that for 1800 to be backward compatible with 1364
> 4.9's "An element can be assigned a value in a single assignment", the
> definition in 1800 should be that selection of a single element is of
> type of the element, but this needs to be clearly defined, to be
> understood by the LRM reader.

[SB] No objection to that.


> Moreover, 1364 is silent on whether a one-element part select of an
> array (a[0:0]) is considered a "partial selection" or selection of a
> single element, and as such it is not clear whether it is legal in
> 1364.

[SB] Syntactically, it is a part-select of width 1.

> If it is not legal, then there is no backward compatibility
> issue with such selection in 1800, and so 1800 is free to define it as
> being a one-element array, if it wishes so. So, even if bit
> selection's intention may be implied from 1364, part select's
> intention is still not clear.
> 
> In fact, I think the type of a[0:0] should be defined as being a one-
> element array, and not as the type of the element, to make it possible
> to write parameterized code as following:
> 
> parameter MSB = ...;
> parameter LSB = ...;
> bit a [MSB:LSB];
> assign a = b[MSB:LSB];
> 
> If the type of "b[MSB:LSB]" would change depending on whether MSB
> equals to LSB or not, it would be much less convenient to define an
> assignment compatible "a".
[SB] I believe it is indeed that way today. When I wrote that 'these are
legal today', I was not referring to that last case (part-select/slice).

Shalom

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Received on Mon Mar 12 05:17:56 2007

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