RE: [sv-bc] Are modport port directions enforced?

From: Francoise Martinolle <fm_at_.....>
Date: Thu Mar 01 2007 - 09:33:11 PST
I think that there are differences, subtle but visible.

When you write to an output the write has to propagate up to the object
connected
in the parent module instance. when you write to a ref port, you are
writing to the
original object and that write is immediately visible. Because there is
a continuous
assignment from the output port to the connected object, there may or
may not be
an extra cycle (depending if the continuous assignment for propagation
is inlined
with the write operation or not).
If you write the output with a force statement, I think that only that
output is forced
but not the object connected to it. That is not the case for the ref
port, the original
object would be forced.

Francoise
    '

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
Jonathan Bromley
Sent: Thursday, March 01, 2007 8:54 AM
To: sv-bc@eda-stds.org
Subject: RE: [sv-bc] Are modport port directions enforced?

[Shalom]

> According to this interpretation, variables are passed as ref ports, 
> which really do reference the original, and one could look at nets as 
> using port collapsing. Does that make sense?

Not to me.  If it is that way, what is the difference between "ref" and
"output" in a modport, given that port mode "output"
has never stopped us reading things?
--
Jonathan Bromley, Consultant

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Received on Thu Mar 1 13:43:53 2007

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