[sv-bc] FW: [sv-ac] new mantis item and proposal #1641

 

________________________________

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Kulshrestha, Manisha
Sent: Friday, October 20, 2006 3:02 PM
To: sv-ac@eda-stds.org
Subject: [sv-ac] new mantis item and proposal #1641


Hello,
 
I have filed a new mantis item #1641. A proposal has been added to
enable usage of assertion severity system tasks in general Verilog code.
 
Thanks.
Manisha