Re: [sv-bc] Re: Package export proposal

From: Gordon Vreugdenhil <gordonv_at_.....>
Date: Mon Sep 25 2006 - 07:59:22 PDT
Francoise Martinolle wrote:

>  Gordon,
> 
> Would you also allow to export symbols inside a design unit other than a
> package?

No, that is not part of the current proposal.  The BNF for the export
only allows the export as a package_item which is valid only
within the immediate package scope.



> And consequently top.x would be allow to refer to the same as p1::x?
> 
> module top;
> import p2::*;
> export p2::*;
>   initial
>         x = 9; // This imports and exports symbol x from p2 which is an
> alias of p1::x
> 
> endmodule
> 
> module fake_oomr;
>    top.x = 10; // This is an alias of p2::x alias of p1::x
> endmodule
> 
> I am really against this. This is blurring the line between oomrs and
> package references.
> 
> I was hoping that the proposal would also provide visibility to exported
> symbols and 
> not creating a new declaration. If we go with creating a new
> declaration, 
> we have to define the semantics to assigning to an aliased declaration. 


I don't understand this part.  Let me try to rephrase to see if
that helps.

Let's assume we're talking about an "int x;" declaration in some
package p1.

There is only one real "object" for p1::x -- the real declaration of
it in p1.  So any reference, by way of any export, always refers
to the same real "object".  My "alias" correspondence is only to
reflect the fact that exporting a name makes multiple package
paths to the same declaration.  So, if p2 exports p1::x then
BOTH p1::x and p2::x refer to the same declaration -- the
real object that is p1::x.

> 
> I would prefer that the export only makes the symbol from p1::x,
> directly visible 
> if someone imports p2. This provides transitivity of the imports without
> changing
> the qualifying name for the symbol.


Hmmm.  So without an import of p2, are you suggesting that p2::x would
not be legal?  That would be very irregular in terms of the use model.

There are some SV-CC issues that will need to be resolved at some
point.  In particular, if a name is exported, is it visible via
a VPI iteration of that exporting package's scope?  I think that
my answer is "no" -- the export would be visible, but you wouldn't
see "x" locally.  This might pose a bit more work from some tools
but I think that it would be the best reflection of reality.

Gord.


> 
> Francoise
>     '
> 
> 
> -----Original Message-----
> From: Gordon Vreugdenhil [mailto:gordonv@model.com] 
> Sent: Friday, September 22, 2006 5:28 PM
> To: Francoise Martinolle
> Cc: Greg Jaxon; Bresticker, Shalom; Brad Pierce; sv-bc@eda-stds.org
> Subject: Re: [sv-bc] Re: Package export proposal
> 
> Francoise,
> 
> I am viewing an "export" as essentially a shorthand to a VHDL alias
> declaration.  So in the case of p2, we have the conceptual declaration:
>     alias p1::x x;
> 
> This means that you *can* refer to just "p2::x" in other places and have
> that resolve to the declaration that originates in p1::x.  Due to
> package dependency rules, we know that any such reference to p2 would
> require p1 to already exist (due p2's dependency on p1) so all of this
> is resolvable at compile time.
> 
> Gord.
> 
> Francoise Martinolle wrote:
> 
> 
>>Gordon,
>>
>>I read the proposal and I have a question regarding the comments for
>>"p2":
>>
>>package p1;
>>
>>   int x,y;
>>
>>endpackage
>>
>> 
>>
>> 
>>
>>package p2;
>>
>>   import p1::x;
>>
>>   export p1::*;    // exports p1::x as the name "x"; 
>>
>>                    // p1::x and p2::x are the same declaration
>>
>>endpackage
>>
>> 
>> 
>>
>>The comment I have problems with is: "p1::x and p2::x are the same 
>>declaration.
>>It seems to infer that you can refer to x in package p1, as either 
>>p1::x or p2::x.
>>
>>I do not like this. The export should only make the symbol x imported 
>>by
>>p2 directly visible
>>by design units importing p2.
>>For example in module top I cannot refer to x as p2::x can I? Only 
>>p1::x is a legal full qualified reference for x.
>>
>>
>>Francoise
>>    '
> 
> 
> --
> --------------------------------------------------------------------
> Gordon Vreugdenhil                                503-685-0808
> Model Technology (Mentor Graphics)                gordonv@model.com

-- 
--------------------------------------------------------------------
Gordon Vreugdenhil                                503-685-0808
Model Technology (Mentor Graphics)                gordonv@model.com
Received on Mon Sep 25 07:59:27 2006

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