RE: [sv-bc] forward typedef declarations

As we were just discussing in yesterday's conference call, there in the
context of nested modules, variables do need to be declared before use,
so I don't think this particular example is legal.

 

Note that such ambiguities may also arise without forward typedef
declarations, due to SV allowing usage before declaration for non-type
objects:

 

bit [$bits(m2) - 1:0] m1;

bit [$bits(m1) - 1:0] m2;

 

While I'm on the subject of nested modules and forward declarations,
could there be an extern module declaration of a nested module ?

 

Shalom