Re: [sv-bc] Nested module questions

From: Brad Pierce <Brad.Pierce_at_.....>
Date: Thu Jul 27 2006 - 12:49:52 PDT
Sorry for the syntax error in that example, I should have written --

 module test (inout io, IFC ifc1, ifc2);
      ...
 endmodule:test
 
 interface IFC(input clk);
    ...
 endinterface:IFC

-- Brad

-----Original Message-----
From: owner-sv-bc@eda-stds.org [mailto:owner-sv-bc@eda-stds.org] On
Behalf Of Brad Pierce
Sent: Thursday, July 27, 2006 12:23 PM
To: sv-bc@eda.org
Subject: Re: [sv-bc] Nested module questions

Unlike type names, interface names can apparently be referred to in a
module declaration before the interface is declared, even though they
are being used there like type names.

  module test (io, IFC ifc1, ifc2);
      ...
  endmodule:test
 
  interface IFC(input clk);
    ...
  endinterface:IFC

-- Brad

-----Original Message-----
From: Steven Sharp [mailto:sharp@cadence.com]
Sent: Thursday, July 27, 2006 12:15 PM
To: sv-bc@eda.org; Brad.Pierce@synopsys.COM
Subject: Re: [sv-bc] Nested module questions

>>Yes. Only data types and typedefs have this restriction.
>
>What about parameters? 

In fact, what doesn't have this restriction?

Tasks and functions don't count, because an apparent forward reference
to them is actually a hierarchical reference instead.

Steven Sharp
sharp@cadence.com
Received on Thu Jul 27 12:50:02 2006

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