RE: [sv-bc] import p::*

From: Logie Ramachandran <Logie.Ramachandran_at_.....>
Date: Tue May 23 2006 - 16:17:39 PDT
HI Brad,
 
You are correct.  The first one is illegal while the second example is
not illegal.
 
Thanks
 
Logie. 

________________________________

From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Brad
Pierce
Sent: Tuesday, May 23, 2006 4:00 PM
To: sv-bc@eda.org
Subject: Re: [sv-bc] import p::*



According to 19.2.2, the following is illegal

 

module foo;

      import q::*;

      wire a = c; // This statement forces the import of q::c;

      import p::c; // The conflict with q::c and p::c creates an error.

endmodule

 

But the following is still legal, isn't it?

 

module foo;

      import q::*;

      import p::c;

      wire a = c;

endmodule

 

Thanks,

 

-- Brad

 

 
Received on Tue May 23 16:17:33 2006

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