[sv-bc] macromdules

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Sun Apr 23 2006 - 06:41:14 PDT
  

1364-2005 deleted mention of macromodules, except in BNF of
module_keyword, in the keyword list, and in 1364 12.1, which says, "The
keyword macromodule can be used interchangeably with the keyword module
to define a module. An implementation may choose to treat module
definitions beginning with the macromodule keyword differently."

This is documented in 
http://www.boyd.com/1364_btf/report/full_pr/425.html. The reasons for
deleting their mention are:

-         Most importantly, if you list them with modules only in some
places and not in others, it gives the impression that in the other
places, there may indeed be a difference. Otherwise, why are they not
mentioned everywhere?

-         On the other hand, if they are not listed anywhere, except for
that sentence in 1364 12.1, it strengthens the impression that they are
the same.

-         If they are indeed interchangeable, there is no need to
mention them, and their use should not be encouraged.

-         If they are not interchangeable (e.g., Verilog-XL treats them
specially), then they are not portable, and again their use should not
be encouraged.

-         They make the LRM more verbose.

-         They make the code more verbose.

Unfortunately, the 1800 LRM mentions them no less than 17 times, which
is 13 too many. Let's delete the 13 unneeded mentions.

 

Shalom

 

Shalom Bresticker

Intel Jerusalem LAD DA

+972 2 589-6852

+972 54 721-1033

I don't represent Intel 

 



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Received on Sun Apr 23 06:42:10 2006

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