I think 1072, 1074 and 1087 are issues we should treat as major, although 1087 may belong to the EC. I think we can close 1086 as addressed by System Verilog. 902 - enhancement - Instantiating gates, primitives and modules in interfaces 905 - enhancement - No way to use type from interface in ANSI-style port declaration 906 - enhancement - Need localparam declarations in V2K-style parameter port lists 907 - enhancement - Default parameter assignment should be optional 909 - minor - All footnotes in Syntax boxes should be hyperlinks 910 - minor - Syntax 3-1 should excerpt all literal-related nonterminals 913 - minor - Local redefinition of interface type identifier -- confusing description in 4.9 914 - minor - "Coupled definitions" -- undefined term in 4.9? 915 - minor - Size wrong in comments of an example of 4.10 916 - minor - "Significant digits" and enumerations -- 4.10 1070 - minor - Library file_path syntax 1071 - minor - Term "variable" misused in section 18 1072 - major - 5.5.1 Missing cases in signedness and extension rules 1073 - minor - 12.3: Is "module m(.p(p));" legal? 1074 - major - section 7: connection of vector to gate terminal 1075 - minor - 15.3.6, 16.2.2: $nochange 1076 - minor - Misuse of term reg in 17.2.4.4 1077 - minor - 1.3f: italicized BNF names 1078 - minor - 17.1.1.7 leading zeros in string format 1079 - minor - 18.4.3.2: incomplete sentence 1080 - minor - "procedural continuous assignments" 1084 - enhancement - `ifdef boolean combination of identifiers 1085 - enhancement - extend new file i/o to allow combinations of fd's 1086 - close as adrressed in SV - Compressed Assignment Statements 1087 - major - How do array manipulation methods work with multi-D arrays? 1089 - minor - review Annex C and DReceived on Sun Apr 9 14:39:20 2006
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