RE: [sv-ec] Re: [sv-bc] Can a function contain a fork/join/any/none?

The 1364-1995 BNF simply allowed the use of "statement" as the body of
the function definition:

function_declaration ::=
   FUNCTION [range_or_type] function_identifier;
   function_item_declaration { function_item_declaration}
   statement
   ENDFUNCTION 

The semantic rules were imposed by section 10.3.4, which were:

a) A function shall not contain any time-controlled statements - that
is, any statements introduce with #, @, or wait.

b) Functions shall not enable tasks

c) A function shall contain at least one input argument

d) A function shall not have any arguments defined as output or inout

e) A function shall include an assignment of the function result to the
internal register that has the same name as the function name.

That's it.

These rules are just reworded versions of the Verilog 1.1a March 1987
manual.

As such, there was no restriction against the use of fork join or any
other looping or control structure, as long as there was no use of
time-controlled statements.

If fork join_none can be considered a time-controlled statement, then it
should be illegal to use this in a task by rule "a".  If it is not
considered as such, then none of the original rules would naturally
apply.

Steve's point that there is an execution order mandated by fork
join_none, that the statement after the join_none must be executed
before the various branches of the fork are executed does sound like a
time controlled statement...



Michael McNamara
mcnamara@cadence.com
408-914-6808 work
408-348-7025 cell


-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Brad
Pierce
Sent: Friday, February 17, 2006 12:58 PM
To: sv-bc@eda.org; sv-ec@eda.org
Subject: Re: [sv-ec] Re: [sv-bc] Can a function contain a
fork/join/any/none?

Dave,

What was the BNF for function_statement in the Verilog-1995 LRM?

-- Brad

-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Rich, Dave
Sent: Friday, February 17, 2006 12:47 PM
To: Steven Sharp; sv-ec@eda.org; stuart@sutherland-hdl.com
Subject: RE: [sv-ec] Re: [sv-bc] Can a function contain a
fork/join/any/none?

If you are referring to Verilog-XL, it has been 20 years. If you are
referring to the LRM, then it's only been since 1364-2005, which hasn't
even been officially released. The BNF for 1995 and 2001 did not allow
fork/join in a function.

> -----Original Message-----
> From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Steven
> Sharp
> Sent: Friday, February 17, 2006 11:19 AM
> To: sv-ec@eda.org; stuart@sutherland-hdl.com; sharp@cadence.com
> Subject: RE: [sv-ec] Re: [sv-bc] Can a function contain a
> fork/join/any/none?
> 
> 
> >I agree with your opinion about their questionable usefulness.  But
this
> >particular barn door has been open for vanilla fork-join for over 20
> years.
> 
> Oops, make that 10 years.  It just seems longer...
> 
> Steven Sharp
> sharp@cadence.com