RE: [sv-bc] 10.8 Named blocks and statement labels - question

Well, section 17.2 does say so explicitly and there is an example in
10.8 of both a begin/end and fork/join with a matching end label.

I agree the current LRM is not perfect, so if you would write a proposal
to fix it, I would be happy to review it.

Dave


> -----Original Message-----
> From: Bresticker, Shalom [mailto:shalom.bresticker@intel.com]
> Sent: Thursday, February 09, 2006 8:55 AM
> To: Rich, Dave; sv-bc@eda.org
> Subject: RE: [sv-bc] 10.8 Named blocks and statement labels - question
> 
> Maybe you interpret it that way, but the LRM does not seem to say it.
It
> talks about 'statement labels' on the one hand, and 'block names' on
the
> other. There is not a statement that they are equivalent. So if it
says,
> for example, that 'end' can be followed by a colon + block name, it
does
> not follow automatically that a statement label can be used instead of
> block name. If so, it needs to be stated explicitly.
> 
> Shalom
> 
> > -----Original Message-----
> > From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On
> > Behalf Of Rich, Dave
> > Sent: Thursday, February 09, 2006 6:49 PM
> > To: Bresticker, Shalom; sv-bc@eda.org
> > Subject: RE: [sv-bc] 10.8 Named blocks and statement labels -
> > question
> >
> > I interpret
> >
> > label: statement
> >
> > to be
> >
> > begin : label
> > 	statement
> > end : label
> >
> >
> >
> > > -----Original Message-----
> > > From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On
> > Behalf Of
> > > Bresticker, Shalom
> > > Sent: Thursday, February 09, 2006 3:37 AM
> > > To: Bresticker, Shalom; sv-bc@eda.org
> > > Subject: RE: [sv-bc] 10.8 Named blocks and statement labels -
> > question
> > >
> > > Follow-up question:
> > >
> > > 10.9 has the following example,
> > >
> > > module ...
> > > always always1: begin ... t1: task1( ); ... end
> > > ...
> > > endmodule
> > > always begin
> > > ...
> > > disable u1.always1.t1; // exit task1, which was called from
> > always1
> > > (static)
> > > end
> > >
> > > (Here also the IEEE reformatting caused "(static)" to jump to
> > the next
> > > line.)
> > >
> > > The question is, the statement label 'always1' here is used
> > as a
> > > hierarchical scope, where 10.8 does not say that labels
> > create such
> > > scopes.
> > >
> > > I found that
> > > 17.2 ("Immediate assertions") says, "The optional statement
> > label
> > > (identifier and colon) creates a named block around the
> > assertion
> > > statement (or any other SystemVerilog statement) and can be
> > displayed
> > > using the %m format specification."
> > >
> > > Such a statement certainly belongs in 10.8 and also in the
> > discussion
> > of
> > > hierarchies in Clause 19.
> > >
> > > Shalom
> > >
> > >
> > > > -----Original Message-----
> > > > From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On
> > > > Behalf Of Bresticker, Shalom
> > > > Sent: Thursday, February 09, 2006 1:11 PM
> > > > To: sv-bc@eda.org
> > > > Subject: [sv-bc] 10.8 Named blocks and statement labels -
> > > > question
> > > >
> > > > 10.8 has the following example:
> > > >
> > > > labelB: fork // label before the begin or fork
> > > > ...
> > > > join : labelB
> > > >
> > > >
> > > > The block_identifier labelB after 'join' is not clear. This
> > is
> > > > a block_identifier whereas the labelB before the 'fork' is
> > a
> > > > statement label, not a block identifier.
> > > >
> > > > Thanks,
> > > > Shalom
> > > >
> > > >
> > > > Shalom Bresticker
> > > > Intel Jerusalem LAD DA
> > > > +972 2 589-6852
> > > > +972 54 721-1033
> > > > I don't represent Intel