RE: [sv-bc] Attributes taking runtime constants?

From: Mark Hartoog <Mark.Hartoog_at_.....>
Date: Thu Feb 02 2006 - 10:16:34 PST
Attribute are specified in the 1364 LRM and it has always specified 
attribute values as constant expressions:

attr_spec ::=
       attr_name [ = constant_expression ] 

A constant expression is any elaboration time constant. It may contain 
literal constants, parameters, local parameters, genvars and expressions
of those.

You cannot do something like this:

const integer I = 5;
(* my_attr = I *)

because a const variable is not an elaboration time constant. It is a
run time 
constant.

The example you give with a local parameter should be legal.

> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On 
> Behalf Of Stacey Secatch
> Sent: Thursday, February 02, 2006 8:36 AM
> To: sv-bc@eda.org
> Subject: [sv-bc] Attributes taking runtime constants?
> 
> Hi all,
> 
> The 3.1a spec does not include this, and at this time, I have 
> no access to the IEEE preliminary versions.
> 
> Has there been any work into allowing attributes to take 
> values from a runtime constant such as a generate variable or 
> a parameter rather than only fixed constants?
> 
> For example, I can currently code:
> (* my_attr = "foo" *)
> 
> But I may want "foo" to be changable passed on parameters, or 
> it's location in a generate block. The following code is a compile
> error:
> 
> localparam my_attr_str = "foo";
> (* my_attr = my_attr_str *)
> 
> This is particularily useful for IP development, where you 
> may want to send different information to the synthesis tools 
> for implementations decisions or placement directives. This 
> behavior is already available in VHDL.
> 
> Thank you-
> Stacey Secatch
> stacey.secatch@xilinx.com
> 
> 
> 
Received on Thu Feb 2 10:16:41 2006

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