RE: [sv-bc] illegal priority if

From: Michael \(Mac\) McNamara <mcnamara_at_.....>
Date: Thu Jan 12 2006 - 13:37:45 PST
And also I would properly code the case statement as:

case ({a,b,c}) {
  3'b100: a_f();
  3'b010: b_f();
  3'b001: c_f();
  3'b000: d_f(); 
  default: ...
endcase

Michael McNamara
mcnamara@cadence.com
408-914-6808 work
408-348-7025 cell


-----Original Message-----
From: Adam Krolnik [mailto:krolnik@lsil.com] 
Sent: Thursday, January 12, 2006 1:29 PM
To: Michael (Mac) McNamara
Cc: Francoise Martinolle; Bresticker, Shalom; sv-bc@eda.org
Subject: Re: [sv-bc] illegal priority if

Hi all;

Mac wrote:
>Another possibility is:

>if (!$onehot({a,b,c}) ) begin  // note that is a, b or c is unknown,
this will not trigger
>	$display($stime,,"Unique If Violation!! More than one term of
{a,b,c} is true");
>	$stop;
>end 
>else if (a) begin
>  ....

I would humbly suggest something like this:

assert property ($onehot($a, $b, $c)) // using the default clock, and
default reset
  else $error("Unique If Violation for {a,b,c} = ", a, b, c);
if (a) begin
....

This would prevent false failures due to skew in the signals or
simulation artifacts.



-- 
    Adam Krolnik
    ZSP Verification Mgr.
    LSI Logic Corp.
    Plano TX. 75074
    Co-author "Assertion-Based Design"
Received on Thu Jan 12 13:37:59 2006

This archive was generated by hypermail 2.1.8 : Thu Jan 12 2006 - 13:38:28 PST