Re: [sv-bc] Assignment pattern lvals (mantis 623)

For packed things, yes.  See 6.9.2.5.

-- Brad

-----Original Message-----
From: Steven Sharp [mailto:sharp@cadence.com]
Sent: Wednesday, April 13, 2005 4:48 PM
To: Brad.Pierce@synopsys.COM; sv-bc@eda.org; fm@cadence.com
Subject: RE: [sv-bc] Assignment pattern lvals (mantis 623)



>Related question:
>can you have a regular concatenation, part select or bit select on a ref
>port?

As I recall, ref ports have strict type equivalence requirements.  Can
a concatenation or part select (which is presumably an anonymous vector
type) ever meet those requirements?

Steven Sharp
sharp@cadence.com