Re: [sv-bc] Proposal on striking the 2 paragraphs

This is better, but it
still leaves the initializers executing before always blocks are started.
I think this is still a problem.

Shalom


On Tue, 12 Apr 2005, Steven Sharp wrote:

> NEW:
> 
> "In Verilog, an initialization value specified as part of the declaration is 
> executed as if the assignment were made from an initial block, after simulation 
> has started. In SystemVerilog, setting the initial value of a static variable as 
> part of the variable declaration (including static class members) shall occur 
> before any initial or always blocks are started."

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