Re: [sv-bc] FW: interpretation of priority if-else or case statement

Krishna,

Maybe you miss the point.

I never talked about synthesizer checking for whether the extra cases
actually occur or not. The point is that 'priority' is not a complete
replacement for 'full_case' in coding because sometimes you know and
even want that the extra cases will occur and you DON'T want to get a
warning or error message from the simulator when it happens, but you
DO want the synthesizer to optimize the logic treating those cases
as don't cares.

In other words, there is a difference between "don't care" and "illegal
or impossible".

Shalom

On Wed, 30 Mar 2005, Krishna Garlapati wrote:

> I think your point 1, is generally true for tools like simulators. Unless
> the values on all case branches are known at compile times, there is no way
> (that I know of) for a synthesis compiler to build logic that can generate an
> assertion when the design is running on a board. It is for this reason that
> for synthesis compilers I believe that full_case and priority are the same.
> 
> > 
> > There are many situations in which only a subset of possible cases are
> > 'care' cases. In those situations, I could use 'full_case', but 'priority'
> > would not be appropriate.
> 
> Unfortunately, Yes. To capture the true intention of the LRM, the synthesis
> tool should now warn the user that synthesis and simulation results might be
> different when using a "priority" case. :-)

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