Re: [sv-bc] error in example 2.7

From: <Shalom.Bresticker@freescale.com>
Date: Wed Jan 26 2005 - 20:09:58 PST

Dave, are you sure this is a mistake?

As I read it, both the LHS and RHS are 6 int arrays.

Your change would change the LHS to a 12 int array.

Shalom

On Wed, 26 Jan 2005, Rich, Dave wrote:

> This is newly reported typo in the LRM
>
>
>
> Change the example in section 2.7
>
> int n[1:2][1:3] = {2{{3{4, 5}}}}; // same as
> {{4,5,4,5,4,5},{4,5,4,5,4,5}}
>
> to
>
> int n[1:2][1:6] = {2{{3{4, 5}}}}; // same as
> {{4,5,4,5,4,5},{4,5,4,5,4,5}}
>
>
>
> http://www.eda.org/svdb/bug_view_page.php?bug_id=0000356
>
>
>
> David Rich
> Verification Technologist
> Design Verification & Test Division
> Mentor Graphics Corporation
> dave_rich@mentor.com
> Office: 408 487-7206
> Cell: 510 589-2625
>
>
>
>

-- 
Shalom Bresticker                        Shalom.Bresticker @freescale.com
Design & Verification Methodology                    Tel: +972 9  9522268
Freescale Semiconductor Israel, Ltd.                 Fax: +972 9  9522890
POB 2208, Herzlia 46120, ISRAEL                     Cell: +972 50 5441478
  
[ ]Freescale Internal Use Only      [ ]Freescale Confidential Proprietary
Received on Wed Jan 26 20:10:10 2005

This archive was generated by hypermail 2.1.8 : Wed Jan 26 2005 - 20:10:23 PST