RE: [sv-bc] DataTypes: wording for optional "var"

> parameter foo = 1'b1;
> wire foo;
> var foo;

Actually "parameter foo = 1'b1;" is a special case for backward
compatibility with Verilog-1995. It is treated as an untyped parameter
that takes its type/size from the value assigned. However,
"parameter [1:0] foo = 1'b1;" follows the same pattern as the rest.

This might be going too far, but a logical extension would also allow

  typedef [7:0] my_byte;
  
to be equivalent to

  typedef logic [7:0] my_byte;

Would this last piece actually make this consistent across all uses of
data_type? Or are there more worms in this can?

Steven Sharp
sharp@cadence.com
Received on Thu Nov 18 15:50:21 2004