[sv-bc] Does an input variable port of interface imply a ref if no modport?

From: Brad Pierce <Brad.Pierce@synopsys.com>
Date: Mon Nov 08 2004 - 17:57:21 PST

At the end of 19.2.2, the LRM says "When an interface is referenced
as a port, the variables and nets in it are assumed to have ref and
inout access, respectively." Does this also apply to variables
and nets that are ports of the interface?

For example, when a port of an interface is of a variable type, such as

           interface IFC (input bit clk);

and an instance of the interface, say 'ifc', is connected without
using a modport,

           BOT bot(ifc);

then is the access of bot.ifc.clk ref, because of the
variable type with no modport, or is it input because of the
original port declaration? (Similarly, if the clk were a wire,
would bot.ifc.clk have inout or input access?)

Here's a full example --
           
interface IFC (input bit clk);
  wire w, x, y, z;
  ...
endinterface

module BOT(IFC i);
  // is i.clk a ref or an input?
endmodule

module TOP(input bit clk);
  IFC ifc(clk);
  BOT bot(ifc);
endmodule

-- Brad
Received on Mon Nov 8 17:56:39 2004

This archive was generated by hypermail 2.1.8 : Mon Nov 08 2004 - 17:56:47 PST