Subject: [sv-bc] Proposal for SV-BC--94
From: Dave Rich (David.Rich@synopsys.com)
Date: Sun Nov 16 2003 - 22:22:25 PST
In section 19.7 page 227 of draft 1
In memMod, "b.clk" should be "a.clk" and "b.start" should be "a.start" .
-- -- David.Rich@Synopsys.com Technical Marketing Consultant http://www.SystemVerilog.org tele: 650-584-4026 cell: 510-589-2625
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