Subject: [sv-bc] RE: [sv-ec] Full Committee SystemVerilog On November 14 - AT Mentor Graphics - San Jose
From: David W. Smith (david.smith@synopsys.com)
Date: Thu Nov 06 2003 - 17:42:02 PST
Hi Vassilios,
To fill in a couple of the items on the agenda:
1. Separate compilation: Karen and I agreed that I would do a presentation
on Package and Separate Compilation. How much time do you wish to allocate?
2. The Enhancement Topic for SV-EC should be the Functional Coverage Goal
Specification. It is the most significant item. I will see if either Arturo
or one of the other internal technical people would like to give the
presentation. How much time do you wish to allocate?
I would suggest that both of these presentations could be 45 minutes.
Regards
David
David W. Smith
Synopsys Scientist
Synopsys, Inc.
Synopsys Technology Park
2025 NW Cornelius Pass Road
Hillsboro, OR 97124
Voice: 503.547.6467
Main: 503.547.6000
FAX: 503.547.6906
Email: david.smith@synopsys.com
http://www.synopsys.com
-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Vassilios.Gerousis@Infineon.Com
Sent: Wednesday, November 05, 2003 6:05 AM
To: sv-ac@eda.org; sv-bc@eda.org; sv-ec@eda.org; sv-cc@eda.org
Subject: [sv-ec] Full Committee SystemVerilog On November 14 - AT Mentor
Graphics - San Jose
Importance: High
Dear SV members,
Mentor has agreed to host our full committee meeting on November 14.
Please make note that all four committees are meeting separately during that
week. We hope to make progress towards our plans for 3.1A. Our host will be
Dennis Brophy. He will send the location and also conference call number for
those who would like to dial in.
Important Request For Members: Please review the latest Draft of 3.1A, and
provide feedback to Each committee and copy David. We must get early, in
enhancing the LRM. David has taken the charter to ensure that all feedback
are synchronized and reviewed. In addition, we still have Brad as the
champion for the BNF, Please include him in your discussion of any BNF
changes.
Meeting Date: Friday 14, November 14.
Meeting Place: Mentor Graphics, San Jose. Direction and location will be
sent. Meeting Time: Meeting will start at 9:00 AM and plan to end at 4:00
PM. Based on the topics so far, we may end an hour earlier.
Agenda:
1- Introduction: Agenda and topics.
2- Status of Each Committee: Review of each committee (enhancements, errata,
closure, etc.) Each presenter will have a maximum of 30 Minutes, including
Questions).
a- SV Design Committee (Johny/Karen).
b- SV Testbench Committee (David Smith/Neil K.)
c- SV DPI (Swanajit/Ghassan).
d- SVA (Faisal/Arif).
3- Special Topic Technical Presentation/Status:
a- Separate Compile: Package/$Root Technical Presentation (???).
b- 3.1A LRM Draft Status (David).
c- BNF Status (Brad).
d- Enhancement Topic Chosen by David for Testbench (approved). TBD
e- DPI enhancement chosen by Swapnajit. TBD
h- SVA enhancement chosen by Faisal. TBD.
4- SV 3.1A Milestones and Status: Review the milestones and see what has
been covered.
5- Summary and Action Items.
I will work with my chairs on the TBD items and get them finalized.
We want to make sure that everyone is informed and is participating. As we
go near to the final milestones, we will need all of you to help in ensuring
that we meet our goals for 3.1A. The first one is solidification of 3.1
standard, since many EDA companies now implementing different features.
Second objective is to ensure that we have minimum number of enhancement
necessary to make the standard is good shape.
For people, who sent me confirmation, you are all confirmed for
attendance.
Best Regards
Vassilios
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