Re: [sv-bc] Erratta or simple proposal for task, function, property,sequencearguments.

Subject: Re: [sv-bc] Erratta or simple proposal for task, function, property,sequencearguments.
From: Adam Krolnik (krolnik@lsil.com)
Date: Thu Nov 06 2003 - 10:27:24 PST

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Hi Steven;

Thanks for catching that - SystemVerilog 3.1 defined that, not 1364-2001.

    Adam Krolnik
    Verification Mgr.
    LSI Logic Corp.
    Plano TX. 75074

• Next message: David W. Smith: "[sv-bc] Response to questions on Packages and Separate Compilation proposal"
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• In reply to: Steven Sharp: "Re: [sv-bc] Erratta or simple proposal for task, function, property,sequence arguments."
• Reply: Adam Krolnik: "Re: [sv-bc] Erratta or simple proposal for task, function, property,sequencearguments."
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