RE: [sv-bc] Is assign bi-directional?

assign is unidirectional. That is clear.

foo[1] is undriven. It should be 1'bz.

foo[0] has two drivers, one of which is 1'bz, and thus should be ignored.

What different behaviors do you see ?

Shalom

From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Bineet Srivastava
Sent: Friday, March 14, 2014 13:26
To: sv-bc@eda.org
Subject: [sv-bc] Is assign bi-directional?

Hi,

For the below case tools have different behavior.

module foo(input  [1:0] a,b,  output [1:0] z);
   wire [1:0]foo;
   assign z = foo;
   assign foo[0] = a[0];
   assign foo[0] = foo[1];
endmodule

My understanding is it is unidirectional one. Is this correct?

Regards
Bineet

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