[sv-bc] RE: [sv-ec] SystemVerilog Face to Face Meeting on November 14


Subject: [sv-bc] RE: [sv-ec] SystemVerilog Face to Face Meeting on November 14
From: David W. Smith (david.smith@synopsys.com)
Date: Fri Oct 24 2003 - 10:47:35 PDT


I will plan on attending.

Regards
David

-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Vassilios.Gerousis@Infineon.Com
Sent: Friday, October 24, 2003 6:47 AM
To: sv-ac@eda.org; sv-bc@eda.org; sv-ec@eda.org; sv-cc@eda.org
Subject: [sv-ec] SystemVerilog Face to Face Meeting on November 14

Dear SV members,
       We plan to conduct an SV meeting in San Jose area. Other days are
taken by other committees. And this is the only day, we can do it to satisfy
critical number of attendees.

topics.

1- Status.
2- Syncrhonization of cross committee work.
3- Review of the first LRM draft (Errata).
4- Special report on enhancements.

Please let me know who would like to attend.

Best Regards

Vassilios



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