[sv-bc] query regarding usage of modport in hierarchical references

Hi,

I have a query regarding the usage of modport in hierarchical references.
From the LRM, I was able to understand that the modports are either used while creating ports or while creating a port connections.
Apart from these can we use the modport in a hierarchical reference.

Example:

interface intf;
wire c;
modport m1(output .mp( c ) );
endinterface

module top;
intf i1();
mid i2(i1);
endmodule

module mid (interface port_p1);
wire d;
assign port_p1.m1.mp = d; //is this usage valid
endmodule

Regards,
Harpreet

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