RE: [sv-bc] Open sourced preprocessor and preprocessor paper

From: Bresticker, Shalom <shalom.bresticker@intel.com>
Date: Mon Oct 25 2010 - 11:50:23 PDT

Wilson,

Thanks for your contributions to the committee work.

Regards,
Shalom

> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
> Wilson Snyder
> Sent: Monday, October 25, 2010 8:14 PM
> To: SV-BC
> Subject: [sv-bc] Open sourced preprocessor and preprocessor paper
>
>
> I referenced an open sourced preprocessor and paper on the
> conference call. The paper is:
>
> "The Verilog Preprocessor: Force for `good and `evil"
>
> http://www.veripool.org/papers
>
> It has lots of fun examples - did you know you could make
> hash tables in the preprocessor? Of main interest to this
> group are the portability issues it discusses. I intended
> to convert this section into specification proposals, but
> haven't gotten the chance yet. I'll try to send out at
> least a summary of the issues discovered.
>
> Also this work was done in conjunction with an open sourced
> preprocessor, vppreproc; details at
>
> http://www.veripool.org/verilog-perl
>
> This preprocessor is also used in the front end of Verilator,
>
> http://www.veripool.org/verilator
>
> The preprocessor implements the full 2009 standard, plus
> fixes for those issues that were identified in "real life"
> such as preprocessing the OVM and in the paper above. It's
> certainly not clean enough to be an executable spec by any
> standard, but might save significant time towards what was
> discussed.
>
> -Wilson Snyder
>
>
> --
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Received on Mon Oct 25 11:50:49 2010

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