[sv-bc] call for participation in SV-DC

From: Havlicek John-R8AAAU <r8aaau@freescale.com>
Date: Thu May 13 2010 - 15:44:22 PDT

Hi Folks:

The IEEE P1800 (SystemVerilog) Working Group has organized an ad hoc
comittee, SV-DC (SystemVerilog Discrete Committee), to study and work on
the addition of discrete domain real modeling capabilities to the
SystemVerilog language.

Discrete domain real models are efficient behavioral abstractions of AMS
components that can run in a digital simulator at speeds greater than
Verilog-AMS components and much greater than Spice components. There is
an immediate need for these components to improve simulation performance
for larger mixed models of units, platforms, and systems. A common use
case is to swap out a continuous domain (Spice or Verilog-AMS) model
with a discrete domain (SystemVerilog real) model. Various verification
analyses should be used to ensure sufficient correlation between the
models being swapped and to validate that the tradeoff between speed and
accuracy is acceptable.

The addition of discrete domain real modeling capabilities to
SystemVerilog will involve problems like the following:

- Provision of real and generic ports and nets.

- Connection of entities of mixed types (real to logic, real to integer,
etc.)
  using appropriate type conversion mechanisms.

- Connection of entities of mixed domain (real to electrical, etc.)
using
  appropriate domain conversion mechanisms.

- Specification of resolution mechanisms for multiple drivers of real
and
  generic types.

Swapping a continuous domain model for a discrete domain model involves
technical details from both domains. Therefore, this work needs to
align with a vision for the eventual merging of SystemVerilog and
Verilog-AMS. For these reasons, it is important to have both
SystemVerilog and Verilog-AMS experts involved in SV-DC.

The first assignment given to the committee is to develop a statement of
the scope of the work that can be accomplished within the current
SystemVerilog PAR (work closes in October 2011). This is a small
window, but we believe we can produce useful capabilities that are
aligned with a broader vision for completing the work. The scope
description is due to the P1800 Working Group on 2010-05-27.

The initial meeting of the SV-DC will be for two hours on Tuesday, May
18th at 10:00 CDT (UTC-05:00) to begin a discussion of the scope.
Dialin information is below.

Thanks,
John & Scott

Dialin information:
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Received on Thu May 13 15:45:02 2010

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