Re: [sv-bc] Proposal to change interface ref-port default mode -or- documentation


Subject: Re: [sv-bc] Proposal to change interface ref-port default mode -or- documentation
From: Clifford E. Cummings (cliffc@sunburst-design.com)
Date: Wed Aug 20 2003 - 18:57:06 PDT


At 09:36 PM 8/20/03 -0400, you wrote:

> >PROPOSAL:
> >I would like to propose that an interface be allowed to include a new
> >declaration: "default ref;" and without the "default ref" declaration, all
> >interface nets AND VARIABLES default to inout ports. Good reasons to
> >implement this change include:
>
>What is your definition of a variable inout port? Or is it your intention
>that this would automatically result in an error on an interface containing
>a variable but without a "default ref"?

A variable inout port would allow one continuous assignment (or procedural
assignments on one side of the inout port? (Jay - can a SystemVerilog
procedural assignment be made to an inout port per new flexible assignment
capabilities?)

A variable inout port would almost always be an error without a modport to
change the default-inout to a direction. I suppose one could use the
default inout port in an interface to a continuous assign on one side of
the port and a procedural READ on the other side of the port.

For all practical purposes, the default inout variable means that an
engineer has to declare modports, or bypass the modport declarations with
the "default ref;" declaration (essentially taking full responsibility for
all the ref-port problems that are about to occur, as opposed to allowing
them to occur by default).

>Steven Sharp
>sharp@cadence.com

Regards - Cliff
----------------------------------------------------
Cliff Cummings - Sunburst Design, Inc.
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Phone: 503-641-8446 / FAX: 503-641-8486
cliffc@sunburst-design.com / www.sunburst-design.com
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