Subject: [sv-bc] SV-BC-8 SDF
From: Dave Rich (David.Rich@synopsys.com)
Date: Sun Aug 17 2003 - 23:42:21 PDT
I have checked the IEEE 1497-2001 spec for SDF and found nothing that
needs to be modified to handle SystemVerilog for interfaces, $root, or
even the proposals for namespaces. This is because it allows
hierarchical pathnames any place an identifier can be used.
We will have to modify the BNF for the specify block to accept interface
port instances as terminals for path delays and timing checks.
Essentially, an interface port instance creates a hierarchy of port
names. Do this will make the mapping to SDF a lot clearer. Note that SDF
does everything by name, not by position, so only the name mapping needs
to be explained
Add a section after 19.4, Modports
19.5 Interfaces and specify blocks
The specify block is used to describe various paths across a module and
perform timing checks to ensure that events occurring at the module
inputs satisfy the timing constraints of the device described by the
module. The module paths are from module input ports to output ports,
and the timing checks are relative to the module inputs. The specify
block refers to these ports as terminal descriptor. Module inout ports
may function as either an input or output terminal. When one of the port
instances is an interface, each signal in the interface becomes an
available terminal, with the default being an inout terminal, or as
restricted by a modport. A ref port may not be used as a terminal in a
specify block.
The following shows an example of using interfaces together with a
specify block:
interface itf;
logic c,q,d;
modport flop(input c,d,output q);
endinterface
module dtype(itf.flop ch);
always_ff @(posedge ch.c) ch.q<=ch.d;
specify
( posedge ch.c => (ch.q+:ch.d)) = (5,6);
$setup( ch.d, posedge ch.c, 1 );
endspecify
endmodule
Replace in section A.&.3
input_identifier ::=
input_port_identifier | inout_port_identifier
output_identifier ::=
output_port_identifier | inout_port_identifier
with
input_identifier ::=
input_port_identifier | inout_port_identifier |
interface_identifier.port_identifier
output_identifier ::=
output_port_identifier | inout_port_identifier |
interface_identifier.port_identifier
-- -- David.Rich@Synopsys.com Technical Marketing Consultant http://www.SystemVerilog.org tele: 650-584-4026 cell: 510-589-2625
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