[sv-bc] Re: [sv-ec] Accellera SystemVerilog 3.1A Focus And Plans


Subject: [sv-bc] Re: [sv-ec] Accellera SystemVerilog 3.1A Focus And Plans
From: Alec Stanculescu (alec@fintronic.com)
Date: Thu Jun 12 2003 - 09:41:17 PDT


Vassilios,

First, I want to congratulate you for your dedication to public
standards and for your success in your activities related to Verilog
and System Verilog. You truly made a difference. Second, I would like
to congratulate all the donors of technologies incorporated in System
Verilog 3.1 which made possible for System Verilog 3.1 to become a
reality.

As I already stated to you privately, I believe that it would be nice if
Accellera would issue a public statement saying that:

1. It owns all rights to System Verilog 3.1.

2. There are no patents that would be inherently infringed upon by any
implementation of a simulator supporting System Verilog 3.1.

3. Accellera gives the right to any company to implement tools based on
System Verilog 3.1 and to sell such tools without any
dues/royalties/fee/etc. to be payed to Accellera or to any of the
original owners of the technologies donated to Accellera and
incorporated in System Verilog 3.1.

I understand from your private statements made to me that the content
of this letter is already implied by Accellera's public position,
however an official statement would help because:

i) a formal review of the donations to Accellera was not conducted by
an independent organization (such as the IEEE), nor by Accellera itself
under the pressure of a public statement, such as the proposed letter.
ii) being the owner of System Verilog, Accellera may make "half
promises" in good faith, which later it would not keep for reasons
which make perfect sense. By "half promises" I mean statements made by
people involved with Accellera's work, such as yourself, which do not
fully legally bind Accellera to make good on those promises.
iii) Usually donations are accompanied by conditions, and it is not
clear that all the conditions associated to each of the technologies
donated to Accellera and incorporated in System Verilog 3.1 are met,
and therefore the rights of Accellera over those donations may be
questionable.

Wishing you continued success in your work,

Alec Stanculescu



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