RE: [sv-bc] Review for Annex A and Annex B of the System-Verilog 3.1 Draft 4

Subject: RE: [sv-bc] Review for Annex A and Annex B of the System-Verilog 3.1 Draft 4
From: David W. Smith (david.smith@synopsys.com)
Date: Thu Apr 10 2003 - 19:21:56 PDT

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Taken care of in LRM-182.

Regards
David

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Shalom
Bresticker
Sent: Monday, April 07, 2003 4:41 AM
To: sv-bc@eda.org
Subject: Re: [sv-bc] Review for Annex A and Annex B of the System-Verilog
3.1 Draft 4

Annex B contains the keyword "longreal".
It does not seem to be used anywhere.
Is that deliberate?

--
Shalom Bresticker                           Shalom.Bresticker@motorola.com
Design & Reuse Methodology                             Tel: +972 9 9522268
Motorola Semiconductor Israel, Ltd.                    Fax: +972 9 9522890
POB 2208, Herzlia 46120, ISRAEL                       Cell: +972 50 441478

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