Subject: Re: [sv-bc] 18.5.1-2, modports -- proposal
From: Francoise Martinolle (fm@cadence.com)
Date: Wed Feb 26 2003 - 12:23:58 PST
Brad,
It is not clear to me what are the rules to require that the full prototype
be provided in an export or import declaration. Is it when the
task/function definition is in a module and the interface modport declaration
is used to either import the tf definition from the module who defines them
to another module where the
interface is passed as a port?
Consequently when tasks and functions are defined in an interface, the
interface modport
does not need to provide the full prototype?
The modport slave and the modport master in the example of 18.5.2 are used
in instantiations of memmod and cpumod, I think this must require that the
full prototype of all slave and master tasks is not needed in the modport
definitions because the tf are defined in the interfaces. Am I
understanding this correctly?
There is also an instantiation omni which uses the entire interface. The
omni instance should have access to all tasks/functions defined in the
interface. Correct?
Contrarily memmod has only access to the slaveread and slavewrite tasks
while cpumod
has only access to te master read and write tasks.
I believe that the comments in the exmaple of section 18.5.2 are incorrect:
module top;
logic clk = 0;
simple_bus sb_intf(clk); // Instantiate the interface
memMod mem(sb_intf.slave); // only has access to the slaveRead task
cpuMod cpu(sb_intf.master); // only has access to the masterRead task
omniMod omni(sb_intf); // has access to all master and slave tasks
endmodule
COmments for memMod should include access to slaveWrite
Comments for cpumod should include access to masterWrite.
I also believe that the example in section 18.5.1 is incorrect.
There is no modport slave or master defined in the interface but child
instances of module top
use the slave and master names.
extract frm exmaple in section 18.5.1
module top;
logic clk = 0;
simple_bus sb_intf(clk); // Instantiate the interface
memMod mem(sb_intf.slave); // only has access to the slaveRead task
cpuMod cpu(sb_intf.master); // only has access to the masterRead task
omniMod omni(sb_intf); // has access to all master and slave tasks
endmodule
Francoise
'
At 10:24 AM 2/26/2003 -0800, Brad Pierce wrote:
>Proposal --
>
>----------------------------
>
>APPEND to the final paragraph of 18.5.1 --
>
> "The only exception is when a modport is used to import a function
> or task from another module, in which case a full prototype
> ahall be used."
>
>This assumes that functions, as well as tasks, can be exported from
>module to module via modports. I don't see any examples of that in
>the LRM, but don't see any prohibition either. If this assumption
>is wrong, then "function or" should be removed from the above append.
>
>----
>
>In the example of 18.5.2, CHANGE --
>
> " import task masterRead(input logic [7:0] raddr),
> task masterWrite(input logic[7:0] waddr));
> // import requires the full task prototype "
>
>TO --
>
> " import task masterRead(),
> task masterWrite());
> // import into module that uses the modport "
>
>------------------------------
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