[sv-bc] SystemVerilog 3.1 Scheduling Semantics


Subject: [sv-bc] SystemVerilog 3.1 Scheduling Semantics
From: David W. Smith (david.smith@Synopsys.COM)
Date: Mon Feb 24 2003 - 16:55:54 PST


The attached document was created and reviewed by the Scheduling Semantics
Working Group. This group was formed from each of the SV committees to
review the scheduling semantics required in SystemVerilog to support the
enhancements being made by each of the committees. The members of the group
are:
 
    Bassam Tabbara (Novas) (SV-AC)
    Dennis Brophy (Model Tech/Mentor) (SV-BC)
    Faisal Haque (Cisco) (SV-AC)
    Jay Lawrence (Cadence) (SV-EC)
    Joao Geada (SV-CC)
    Matt Maidment (Intel) (SV-BC)
    Michael Rohleder (Motorola) (SV-CC)
    Neil Korpusik (Sun) (SV-EC)
    
and Phil Moorby, Arturo Salz, and Peter Flake from Synopsys representing the
original definition. There were 9 votes in total (one for each committee
representative and 1 for the trio representing the original definition).
 
Cliff Cummings (Sunburst-Design), Tej Singh (Model Tech/Mentor), and Mehdi
Mohtashemi (Synopsys) also attended some of the meetings and participated in
the discussions.
 
The result of this working group was the unanimous (one member abstained due
to time conflicts with work limiting his ability to evaluate the work).
 
In addition to the attached document there will be a presentation on Friday
(being crafted by Arturo Salz and Jay Lawrence) that covers the technical
content and rationale for the document.
 
Regards
David
David W. Smith
Synopsys Scientist

Synopsys, Inc.
Synopsys Technology Park
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Hillsboro, OR 97124

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