[sv-bc] 18.4, proposal for SV-BC 39 (illegal modport declarations)


Subject: [sv-bc] 18.4, proposal for SV-BC 39 (illegal modport declarations)
From: Brad Pierce (Brad.Pierce@synopsys.com)
Date: Sat Feb 22 2003 - 12:06:32 PST


Proposal --

In Section 18.4 on "Interfaces:Modports" (13.4 in the 3.0 LRM),
before the final sentence, add the following:

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All of the names used in a modport declaration shall be declared
by the same interface as is the modport itself. In particular,
the names used shall not be those declared by another enclosing interface,
and a modport declaration shall not implicitly declare new ports.
The following interface declarations would be illegal:

   interface i;
          wire x, y;
          interface illegal;
            wire a, b, c, d;
            // x, y not declared by this interface
            modport master(input a, b, x, output c, d, y);
            modport slave(input a, b, x, output c, d, y);
          endinterface : illegal
          illegal ch1, ch2;
          modport master2 (chi.master, ch2.master);
   endinterface : i

   interface illegal;
           // a, b, c, d not declared by this interface
           modport master(input a, b, output c, d);
           modport slave(output a, b, output c, d);
   endinterface : illegal

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