Re: several proposal submitted for email voting


Subject: Re: several proposal submitted for email voting
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Mon Jan 13 2003 - 09:47:11 PST


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> From owner-sv-bc@eda.org Mon Jan 13 06:11:37 2003
>
> Johny,
>
> typically in other committees, anyone not voting is assumed to abstain.
> It seems to me more logical than assuming they approved. Some people
> may not vote because they don't care, forgot or were not available.
>
> What other people think?
>
> Francoise
> '

Sounds like a reasonable idea to me, particularly when you don't know
if people have lost their phone connection or are away from their
e-mail (maybe on vacation).

It would make it easier to tell which items only passed with narrow
support at a later date.

It should only slow down the voting if a quorum is required.

Kev.

 
> At 04:39 PM 1/12/2003 +0200, Srouji, Johny wrote:
>
> >Hi All,<?xml:namespace prefix = o ns =
> >"urn:schemas-microsoft-com:office:office" />
> >
> >
> >
> >Attached are several proposals that have a second, and because they were
> >previously discussed, we are likely able to pass them without further
> >discussions. Therefore, I move that we vote on these topics through mail.
> >
> >
> >
> >Let me know if you have an issue w/ any of these proposals, or send your
> >vote/clarification/discussions. Anyone not voting will be assumed to
> >approve the changes. Voting will close by next Monday, 01//20/2003 at
> >11:00 AM (right after our tele-call). If there is no discussion of any of
> >these items by this date, then proposal will pass.
> >
> >
> >
> >Following is the list of proposals:
> >
> >
> > * SV-BC2 - timescale vs. timeunit
> > * This is a write-up of the behavior agreed upon at the 11/15 F2F
> > * http://www.eda.org/sv-bc/hm/0224.html - posted 12/6/02 by Dave Rich
> > * SV-BC44-3 self determination of assignment as expression
> > * http://www.eda.org/sv-bc/hm/0271.html - posted 12/26/02 by Dave Rich
> > * SV-BC44-9 behavior of disable
> > * http://www.eda.org/sv-bc/hm/0272.html - posted 12/26/02 by Dave Rich
> > * SV-BC44-15 removal of "changed"
> > * http://www.eda.org/sv-bc/hm/0273.html - posted 12/26/02 by Dave Rich
> > * Clarification of operations allowed on unpacked arrays
> > * SystemVerilog allows certain operations on aggregate unpacked
> > arrays. From LRM section 4.2, it allows read and writes as a whole or
> > slice of an unpacked array, but not as part of an integer expression.
> > From this wording, it is unclear as to whether or not a comparison of
> > two unpacked arrays would be allowed.
> > * Karen proposed that we append a bullet to the first list of bullets
> > that reads:
> > * -- Equality operations the array or slice of the array, e.g.
> > A==B, A[i:j] != B[i:j]
> > * Also a small correction to the preceding paragraph
> > * Replace:
> > * The examples provided with these rules assume that A and B are arrays.
> > * With:
> > * The examples provided with these rules assume that A and B are
> > arrays of the same shape and type.
> >Regards,
> >
> >--- Johny.
> >
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<html>
Johny,<br>
<br>
typically in other committees, anyone not voting is assumed to
abstain.<br>
It seems to me more logical than assuming they approved. Some
people<br>
may not vote because they don't care, forgot or were not available.
<br>
<br>
What other people think?<br>
<br>
Francoise<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; '<br>
<br>
At 04:39 PM 1/12/2003 +0200, Srouji, Johny wrote:<br>
<br>
<blockquote type=cite class=cite cite><font face="Comic Sans MS" size=2 color="#000080">Hi
All,&lt;?xml:namespace prefix = o ns =
&quot;urn:schemas-microsoft-com:office:office&quot; /&gt;<br>
<br>
&nbsp;<br>
<br>
Attached are several proposals that have a second, and because they were
previously discussed, we are likely able to pass them without further
discussions. Therefore, I move that we vote on these topics through
mail.<br>
<br>
&nbsp;<br>
<br>
Let me know if you have an issue w/ any of these proposals, or send your
vote/clarification/discussions. Anyone not voting will be assumed to
approve the changes. Voting will close by next Monday, 01//20/2003 at
11:00 AM (right after our tele-call). If there is no discussion of any of
these items by this date, then proposal will pass.<br>
<br>
&nbsp;<br>
<br>
Following is the list of proposals:<br>
<br>
&nbsp;
<ol><b>
<li>SV-BC2 - timescale vs. timeunit</b>
<li>This is a write-up of the behavior agreed upon at the 11/15 F2F
</font><font face="Comic Sans MS" size=2 color="#0000FF"><u>
<li><a href="http://www.eda.org/sv-bc/hm/0224.html" eudora="autourl">http://www.eda.org/sv-bc/hm/0224.html></u></font><font face="Comic Sans MS" size=2 color="#000080">
- posted 12/6/02 by Dave Rich<b>
<li>SV-BC44-3 self determination of assignment as expression</b> </font><font face="Comic Sans MS" size=2 color="#0000FF"><u>
<li><a href="
http://www.eda.org/sv-bc/hm/0271.html" eudora="autourl">http://www.eda.org/sv-bc/hm/0271.html></u></font><font face="Comic Sans MS" size=2 color="#000080"> - posted 12/26/02 by Dave Rich<b>
<li>SV-BC44-9 behavior of disable </b></font><font face="Comic Sans MS" size=2 color="#0000FF"><u>
<li><a href="
http://www.eda.org/sv-bc/hm/0272.html" eudora="autourl">http://www.eda.org/sv-bc/hm/0272.html></u></font><font face="Comic Sans MS" size=2 color="#000080"> - posted 12/26/02 by Dave Rich<b>
<li>SV-BC44-15 removal of &quot;changed&quot;</b> </font><font face="Comic Sans MS" size=2 color="#0000FF"><u>
<li><a href="
http://www.eda.org/sv-bc/hm/0273.html" eudora="autourl">http://www.eda.org/sv-bc/hm/0273.html></u></font><font face="Comic Sans MS" size=2 color="#000080"> - posted 12/26/02 by Dave Rich<b>
<li>Clarification of operations allowed on unpacked arrays</b>
<li>SystemVerilog allows certain operations on aggregate unpacked arrays. From LRM section 4.2, it allows read and writes as a whole or slice of an unpacked array, but not as part of an integer expression. From this wording, it is unclear as to whether or not a comparison of two unpacked arrays would be allowed.
<li>Karen proposed that we append a bullet to the first list of bullets that reads:
<li>&nbsp;&nbsp;&nbsp; -- Equality operations the array or slice of the array, e.g. A==B, A[i:j] != B[i:j]
<li>Also a small correction to the preceding paragraph
<li>Replace:
<li>The examples provided with these rules assume that A and B are arrays.
<li>With:
<li>The examples provided with these rules assume that A and B are arrays of the same shape and type.
</ol>Regards,<br>
&nbsp;<br>
--- Johny.<br>
&nbsp;</font></blockquote></html>



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