Re: Attribute names


Subject: Re: Attribute names
From: Dave Rich (David.Rich@synopsys.com)
Date: Tue Nov 19 2002 - 12:54:55 PST


Hi Brad,

I think you bring some good points about name spaces.

First of all, specify blocks are no longer a separate name space because
specparams can now be declared outside of it, and parameters can be used
inside. This should be brought up to the IEEE ETF.

Secondly, since the global scope is now called $root, the module name
space is now just another block name. This needs to be clarified by this
committee.

You could argue that since compiler directives are not part of the BNF,
it's really doesn't have it's namespace that co-exists with the rest of
the language.

And finally, your main point about restricting attribute usage is a very
good one, But I think the original goal for attributes was to make them
tool specific, and not part of the language. You don't want a tool to
choke on an attribute that was meant for another tool. In any case, I
see this as being an enhancement request.

Dave

Brad Pierce wrote:

> Which space do attribute names live in?
>
> In V2K, they have their own namespace. In SystemVerilog, however,
> according to section 12.9, there is only one namespace, not 7
> namespaces as in V2K. But that section makes no specific mention of
> attributes.
>
> Also, why is there no way to declare attributes and their
> types? Wouldn't a design project be employing some limited set of
> project-standard attributes, not inventing new attributes all over the
> place as they go along. If so, it might make more sense to declare
> these standard attributes in $root. Likewise, a tool could provide a
> header file that declares (and documents) the set of attributes it
> understands.
>
> It might also be useful to enable declarations that restrict the kind
> of objects to which a particular attribute can be attached. Maybe
> one attribute only makes sense for interfaces and another only for
> functions. It would be convenient if this could be declared as part
> of their type.
>
> -- Brad
>
>
>
>

-- 
--
Dave Rich
Principal Engineer, CAE, VTG
Tel:  650-584-4026
Cell: 510-589-2625
DaveR@Synopsys.com



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