Subject: RE: 1364-2001 issues
From: Srouji, Johny (johny.srouji@intel.com)
Date: Tue Nov 12 2002 - 16:15:14 PST
I strongly agree w/ Karen and would like to second this.
We have to discuss, vote and finalize these issues and then forward to IEEE
standard. Some of these issues are also specific to System Verilog.
Thanks,
--- Johny.
-----Original Message-----
From: Karen Pieper [mailto:Karen.Pieper@synopsys.com]
Sent: Tuesday, November 12, 2002 8:37 AM
To: Shalom Bresticker; sv-bc@eda.org
Cc: etf@boyd.com
Subject: Re: 1364-2001 issues
While I agree up to a point, the BNF for SystemVerilog 3.0 is a part of
that standard,
and does need to be voted on before changes can be made even if the changes
are also necessary in the IEEE standard. What we have done is to make the
obvious
errata fixes in the SystemVerilog BNF, and anything controversial has been
referred
back to the IEEE ETF for the recommended fix.
Karen
At 10:11 AM 11/12/02 +0200, Shalom Bresticker wrote:
>Precedence: bulk
>
>I suggest that if SystemVerilog committees find issues in 1364-2001
>(BNF or elsewhere),
>that those issues simply be forwarded to the 1364 WG for handling.
>
>1364 will have to deal with them anyway,
>so it is an inefficient and unnecessary duplication of work for SV to
>discuss them as well.
>
>SV's time is limited enough and there is so much work to do,
>it would be a shame to spend the time on non-SV issues.
>
>Furthermore, it is possible that 1364 may have different conclusions
>than SV,
>so inconsistencies might arise.
>
>--
>Shalom Bresticker Shalom.Bresticker@motorola.com
>Design & Reuse Methodology Tel: +972 9 9522268
>Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890
>POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
>
>"The devil is in the details."
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