RE: SystemVerilog Basic Committee all day meeting


Subject: RE: SystemVerilog Basic Committee all day meeting
From: David W. Smith (david.smith@synopsys.com)
Date: Wed Oct 09 2002 - 11:14:34 PDT


Can be done. Let us know when it is fixed so that travel plans can be
adjusted.

Regards
David

David W. Smith
Synopsys Scientist

Synopsys, Inc.
Synopsys Technology Park
2025 NW Cornelius Pass Road
Hillsboro, OR 97124

Voice: 503.547.6467
Main: 503.547.6000
FAX: 503.547.6906
Email: david.smith@synopsys.com
http://www.synopsys.com

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
Karen Pieper
Sent: Wednesday, October 09, 2002 10:30 AM
To: sv-bc@eda.org
Subject: SystemVerilog Basic Committee all day meeting

Hi, all!

        Peter is free on 11/15 to discuss interfaces and any other
issues we need
his input on. I would
like to propose that we have an all day meeting here, hosted by
Synopsys,
from 9am to 3pm Pacific
time. (Note this is the same week as ICCAD). Please let me know if
this
is an issue.

Thanks,

Karen



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