Open Verification Library (OVL) Technical
Subcommittee
Scope and charter
The OVL library of assertion checkers is intended to be used by design,
integration, and verification engineers to check for good/bad behavior in
simulation, emulation, and formal verification.
The subcommittee is responsible for the definition and development of the
standard Open Verification Library (OVL) language reference manual and
assertion-checker libraries.
Approved OVL
Standards
OVL Version
2.2 - This is the latest OVL release implemented in Verilog, VHDL,
System Verilog and PSL (Verilog flavor).
Older versions of OVL can be made available on request by contacting the OVL chairs
but the latest version is recommended (backwards compatible, with benefit of
bug fixes).
Errata and Feedback
To report or see current errata of the standard OVL library,
click here (Mantis reporter login-required; select the standard OVL
errata page).
If you would like to report am errata but are not a Mantis
reporter, please send a message to the OVL chairs.
Additional
Information
More public OVL information can be found in
Accellera Groups Public Documents and from the OVL Users
Website
Visit the OVL committee group
page (Accellera member login required).
The group e-mail reflector is ovl@lists.accellera.org
Contribute to OVL
development
The OVL committee is actively looking for companies and individuals to help
define the next versions of the Open Verification Library. The
committee meets on a regular basis and have a bi-weekly conference. To join
the OVL committee, click the appropriate link below:
| 
