KMLM List

["Philipp A. Hartmann" <philipp.hartmann@xxxxxxxx>]

Kevin,

I posted a small helper utility for setting all bits of a logic variable
to 'Z' to this forum a while back.  You can find a slightly updated
version of this attached to this mail (including a small example).

Effectively, it adds an sc_utils::SC_HIGH_IMPEDANCE constant, that can
safely be assigned to arbitrary sc_logc or sc_lv<W> variables and signals:

  sc_lv<6> lv = SC_HIGH_IMPEDANCE; // "ZZZZZZ"

  sc_signal< sc_lv<3> > sig;
  sig = SC_HIGH_IMPEDANCE;         // "ZZZ"

HTH and Greetings from Oldenburg,
  Philipp

On 20/03/12 18:13, Somervill, Kevin M. (LARC-D203) wrote:
> I replied directly to David, apologies.
> 
> PEBKAC.  In setting the hi-z state for my vector, I used .write(“Z”) as 
> opposed to .write(“ZZZZZZZZ”).  Is there a way to an entire array to a value 
> similar to (others => ‘Z’) in VHDL?
> 
> Thanks.
> 
> Kevin
> 
> 
> From: david.black@xxxxxxxxxx [mailto:david.black@xxxxxxxxxx]
> Sent: Monday, March 19, 2012 10:43 AM
> To: Somervill, Kevin M. (LARC-D203)
> Cc: systemc-forum@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [systemc-forum] Modeling tri-state signal
> 
> sc_signal_rv is the correct approach. You probably need to post your code 
> here if you want help.
> 
> ________________________________
> David C Black, Senior Consulting Engineer
> Doulos Inc http://www.Doulos.com
> Voice: 512.850.4322 Skype: dcblack FAX: 888.467.4609
> 
> Doulos - Developing Design Know-how
> 
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> 
> 
> 
> -----<systemc-forum@xxxxxxxxxxxxxxxxxxx<mailto:systemc-forum@xxxxxxxxxxxxxxxxxxx>>
>  wrote: -----
> To: 
> "systemc-forum@xxxxxxxxxxxxxxxxxxx<mailto:systemc-forum@xxxxxxxxxxxxxxxxxxx>" 
> <systemc-forum@xxxxxxxxxxxxxxxxxxx<mailto:systemc-forum@xxxxxxxxxxxxxxxxxxx>>
> From: "Somervill, Kevin M. (LARC-D203)"
> Sent by:
> Date: 03/19/2012 07:22AM
> Subject: [systemc-forum] Modeling tri-state signal
> Hello,
> I’m trying to model bidirectional I/O (at a low level) and I get the multiple 
> drivers error or what I believe is incorrect resolution on ‘Z’.  I’ve been 
> googling for about a week and have not found anything that shows me how to 
> model tri-state signal.  In the spec, it states that I should use 
> sc_signal_rv, but I don’t get the expected output.  If I drive a ‘Z’ at one 
> place and a ‘1’, I get ‘X’.  If I drive a ‘Z’ from one driver, but a ‘0’ from 
> the other, I get a ‘0’.  I expect that there’s an obvious fix for this issue, 
> but I’ve not been able to find it.  Any suggestions?
> 
> Thanks,
> Kevin


-- 
Philipp A. Hartmann
Hardware/Software Design Methodology Group

OFFIS Institute for Information Technology
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Escherweg 2 · 26121 Oldenburg · Germany · http://offis.de/en/
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